Optoelectronic, high power, and high frequency devices are increasingly being fabricated using wide band gap compound semiconductor materials such as gallium nitride, aluminium nitride, and silicon carbide. Such semiconductor materials are frequently grown heteroepitaxially in thin film form onto a suitable substrate which provides a template for crystal growth. Typical substrates include sapphire, silicon carbide, and silicon. For semiconductor devices such as microwave amplifier circuits, the substrate should be electrically insulating for the device to function.
A well known problem in semiconductor devices is that of heat dissipation. High temperatures often limit the performance and/or lifetime of such devices. This is a particular problem in semiconductor devices which operate at high power and/or high frequency such as microwave amplifiers, power switches and optoelectronic devices. It is therefore desirable to be able to spread any heat generated by component devices to reduce temperatures and thus improve device performance, increase device lifetime, and/or increase power density. Accordingly, it is desirable to utilize a substrate material with a high thermal conductivity to spread the heat generated by a device, lowering the power density and facilitating dissipation via a heat sink thus improving device performance, increasing lifetime, and/or enabling an increase in power density.
Diamond has unique properties as a heat spreading material, combining the highest room temperature thermal conductivity of any material, with high electrical resistivity and low dielectric loss when in an intrinsic undoped form. Thus diamond is utilized as a heat spreading substrate for semiconductor components in a number of high power density applications. The advent of large area polycrystalline diamond produced by a chemical vapour deposition (CVD) technique has expanded the applications for diamond heat spreaders via an increase in area and a reduction in cost. The majority of favourable thermal, dielectric and insulating properties of diamond are not dependent on the single crystal structure of naturally occurring or synthetic single crystal diamond material. Accordingly, polycrystalline CVD diamond wafers have been developed and are commercially available in sizes that enable them to be directly integrated with the fabrication processes of wide band gap semiconductors as a substrate material.
In light of the above, it is evident that for thin film compound semiconductor materials, an ability to integrate diamond as a carrier substrate could greatly improve thermal performance. For high power devices, the challenge is to position an active region of a device in as close proximity as possible to the heat spreading diamond substrate, since any intermediate carrier substrate material such as sapphire, silicon, or silicon carbide acts as a thermal barrier.
Compound semiconductor materials can be grown directly on a polycrystalline diamond substrate using, for example, metal organic chemical vapour deposition (MOCVD) technique. Alternatively, a thin layer of monocrystalline material such as silicon, silicon carbide, or a nitride can be disposed on a polycrystalline diamond substrate and compound semiconductor material epitaxially grown on the thin layer of monocrystalline material.
U.S. Pat. No. 7,595,507 and US 2010/0001293 disclose methods of forming semiconductor device substrates which comprise growing diamond over a monocrystalline silicon carbide layer. US 2009/0272984 also discloses a method of forming a semiconductor device substrate comprising diamond and silicon carbide. Such composite diamond-silicon carbide substrates can be used to form semiconductor devices. When forming such devices, the mono-crystalline silicon carbide layer can be used to grow a monocrystalline semiconductor layer thereover.
US 2006/0113545 discloses substrate structures comprising silicon-diamond-silicon multilayer structures. One problem with using silicon is that it offers relatively poor thermal and resistivity properties compared to silicon carbide. As such, it is desirable to make the silicon layer very thin such that the polycrystalline diamond will be disposed close to the active semiconductor components to effectively dissipate heat generated during operation.
Various prior art documents disclose methods of growing polycrystalline diamond on a substrate, reducing the thickness of the substrate to form a thin single crystal layer disposed on the polycrystalline diamond, and then growing active semiconductor layers on the thin single crystal layer. Examples of such prior art documents are briefly discussed below.
WO 2005/122284 and WO 2006/100559 disclose growth of polycrystalline diamond material on a silicon wafer followed by thinning of the silicon wafer by grinding or lapping to achieve a thin layer of silicon disposed on the polycrystalline diamond material.
EPO442304 discloses growth of polycrystalline diamond material on a silicon wafer. It is described that a thin layer of single crystal silicon carbide forms at an interface between the silicon and diamond material during growth. The document suggests that the silicon wafer can be removed to leave the thin layer of silicon carbide adhered to the polycrystalline diamond material and this thin layer of silicon carbide can be used as a growth surface for fabrication of semiconductor layers. The present inventors consider that this is incorrect as they have found that while a thin layer of silicon carbide does form at the interface between the silicon and diamond materials, this layer is amorphous and found the latter not suitable for fabricating single crystal semiconductor materials thereon by epitaxial growth.
WO2005/074013 and US2009/0272984 disclose ion implanting a buried SiO2 layer into a silicon carbide wafer, growing polycrystalline diamond material on the wafer, and then removing the bulk of the silicon carbide wafer by using the implanted SiO2 layer as a release layer.
U.S. Pat. No. 7,595,507 discloses ion implanting a buried SiO2 layer of 100 nm to 200 nm thickness into a silicon wafer, growing polycrystalline diamond material on the wafer, and then removing the bulk of the silicon wafer using a wet etch with the thin buried SiO2 layer acting as an etch stop to achieve a thin layer of silicon disposed on the polycrystalline diamond material.
U.S. Pat. No. 7,695,564 discloses a similar method which comprises ion-implantation of oxygen into a silicon wafer to form a wafer comprising a bulk silicon wafer layer of an unspecified thickness, a buried oxide layer having a thickness of approximately 100-200 nm, and a silicon overlay structure having a thickness of 50-500 nm. A polycrystalline diamond film of approximately 200 to 1500 micrometers is grown on the silicon overlayer. The bulk silicon wafer layer and the buried oxide layer are then removed to leave a composite structure comprising the polycrystalline diamond film and the silicon overlayer. A number of different methods are described for removing the silicon to form a diamond substrate with a thin silicon overlayer including: (1) selectively dissolving the buried oxide layer; (2) wet etching the bulk silicon layer followed by wet etching of the buried oxide layer; (3) lapping and polishing the bulk silicon layer followed by wet etching; or (4) lapping and polishing the bulk silicon layer followed by dry etching. The finished silicon-on-diamond substrate consists of an approximately 50 to 200 nm thick monocrystalline silicon film which is epitaxially fused to an approximately 300 to 1500 micrometer thick polycrystalline diamond substrate.
While it would seem to be simple in principle to apply any of the aforementioned techniques to thin down a substrate wafer after polycrystalline diamond growth thereon to achieve a polycrystalline diamond wafer with a thin layer of the substrate wafer adhered thereto, in practice a problem exists with known prior art techniques. Namely, as the substrate wafer is thinned down cracking occurs in the thin layer such that although a thin layer is achieved is not of high quality. This is problematic because the quality of the thin layer will affect the quality of the semiconductor layers epitaxially grown thereover to form an electronic device and this detrimentally affects device performance. In particular, the present inventors have found that as the single crystal layer adhered to the polycrystalline diamond material is thinned to a depth of less than 100 μm cracks begin to form in the thin layer of single crystal material. While it was initially thought that such cracking may be a result of mechanical damage caused by grinding, lapping, and polishing techniques, it has been found that this same problem occurs when using etching techniques such as those described above.
Another problem with prior art methods is that compound semiconductor materials grown on substrates comprising diamond wafers tend to yield a layer of compound semiconductor material which exhibits a high degree of tensile stress. The present inventors have identified that this is caused by a thermal expansion coefficient mismatch between the diamond material and the compound semiconductor material. Specifically, compound semiconductor materials such as GaN have a higher thermal expansion coefficient than diamond material between room temperature and the growth temperature at which the compound semiconductor material is deposited. Compound semiconductors such as GaN can be deposited by a number of techniques including chemical vapour deposition (CVD), molecular beam epitaxy, and sputtering and growth temperatures can be in excess of 1000° C. On cooling after CVD growth of the compound semiconductor material on a suitable substrate, the compound semiconductor layer and the substrate contract. If the substrate comprises a diamond wafer, the diamond material does not contract as much as the compound semiconductor layer would natural do as diamond material has a much lower thermal expansion coefficient than typical compound semiconductors. The diamond substrate wafer therefore generates tensile stress within the compound semiconductor layer during cooling and this can affect the performance of the layer in electronic applications. Furthermore, the tensile stress in the compound semiconductor layer can result in cracking of the layer during cooling or subsequent handling.
It is an aim of certain embodiments of the present invention to solve one or more of the aforementioned problems and provide a method of fabricating a high quality, crack free, low tensile stress layer of compound semiconductor material on a substrate comprising a wafer of polycrystalline diamond material. Advantageously, the layer of compound semiconductor material is disposed directly on the wafer of polycrystalline diamond material or positioned close thereto with one or more very thin intermediate bonding layers disposed between the compound semiconductor and diamond material. The one or more intermediate bonding layers may be formed from single crystal materials such as silicon, silicon carbide, or nitrides suitable for epitaxial growth of compound semiconductors.